Entegris Offers New FOUP Form-Factors for Non-Standard Wafers Over the last few years, 3D stacking has gone from a relatively niche fabrication method to an absolute necessity for cutting-edge applications. As chipmakers delve into smaller and smaller nodes, stacking and die-bonding wafers has become a preferred way of creating more processing power in a smaller space. Stacked and bonded wafers don’t behave the same way as 2D wafers: Wafers are thinned prior to bonding, which results in wafers that can sag when handled Bonded wafers are thicker and heavier than 2D wafers when assembled Bonded wafers can also warp following assembly Many automation tools rely on the predictable geometry and characteristics of 2D silicon wafers for safe handling and transport. While stacked and bonded wafers are a game-changer for miniaturization, they can also force manufacturing compromises unless chipmakers adopt specialized tools for the back end of the line (BEOL).

The use of silicon carbide (SiC) semiconductors offers a huge advantage for electric vehicles (EVs) due to lower switching losses and higher efficiencies, but cost has always been a drawback. SiC wafer manufacturing can suffer from high costs and lower yields, causing SiC semiconductors to cost up to eight times more than their silicon equivalents. This cost often gets passed on to the end customer, making EVs more expensive.

A “one size fits all” approach for chemical air filtration entails a productivity and safety risk in commercial environments reliant on pure air quality. Trying to use one type of chemical air filter for every scenario may provide protection, but without optimization the protection is both limited and temporary.